Vulnerability record · CVE-2020-24512 · published 9 June 2021
CVE-2020-24512: Intel microcode observable discrepancy vulnerability
Intel · Microcode
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:L/I:N/A:N
Affected products
5 vulnerable configurations from NVD's CPE data, grouped by vendor and product.
References
| Link | Tags |
|---|---|
| https://cert-portal.siemens.com/productcert/pdf/ssa-309571.pdf | Third Party Advisory |
| https://lists.debian.org/debian-lts-announce/2021/07/msg00022.html | Third Party Advisory |
| https://security.netapp.com/advisory/ntap-20210611-0005/ | Third Party Advisory |
| https://www.debian.org/security/2021/dsa-4934 | Third Party Advisory |
| https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00464.html | Vendor Advisory |
| https://cert-portal.siemens.com/productcert/pdf/ssa-309571.pdf | Third Party Advisory |
| https://lists.debian.org/debian-lts-announce/2021/07/msg00022.html | Third Party Advisory |
| https://security.netapp.com/advisory/ntap-20210611-0005/ | Third Party Advisory |
| https://www.debian.org/security/2021/dsa-4934 | Third Party Advisory |
| https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00464.html | Vendor Advisory |
Track CVE-2020-24512 inside VULONE
Watch it alongside the ransomware crews, C2 infrastructure and forum chatter that reference it, query it through the API and pull it into your SIEM over TAXII.
Related vulnerabilities
Same products first, then exploited flaws of the same weakness class.
Source: NIST National Vulnerability Database (record CVE-2020-24512), CISA KEV, FIRST EPSS (scores of 2026-10-10). This page is refreshed as NVD updates the record.